Design strategies for multi-channel low-noise recording systems
Reference:
Rieger, R. and Taylor, J. T., 2009. Design strategies for multi-channel low-noise recording systems. Analog Integrated Circuits and Signal Processing, 58 (2), pp. 123-133.
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Official URL:
http://dx.doi.org/10.1007/s10470-008-9230-5
Abstract
Parallel recording of micro-scale signals using an integrated system approach has become feasible with recent advances in technology. Practical applications include the recording of neural-signals in a brain-computer interface or in prosthetic implants. In an integrated circuit implementation the restriction in size and available power pose considerable challenges, especially in implanted devices. Furthermore, the provision of both high gain and excellent noise performance in the presence of input offset voltages are mandatory. The presented tutorial highlights design strategies for recording system optimization and compares the performance of actual system implementations with the best-case performance achievable in theory. Special consideration is given to the noise vs. power and offset-tolerance vs. noise trade-offs. An application dependent design strategy is proposed.
Details
| Item Type | Articles |
| Creators | Rieger, R.and Taylor, J. T. |
| DOI | 10.1007/s10470-008-9230-5 |
| Uncontrolled Keywords | cmos design, multi-channel recording, bipolar design, offset voltage, noise efficiency |
| Departments | Faculty of Engineering & Design > Electronic & Electrical Engineering |
| Research Centres | Centre for Advanced Sensor Technologies (CAST) |
| Refereed | Yes |
| Status | Published |
| ID Code | 12696 |
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