VLSI arithmetic with current mode multiple valued logic
Summerfield, S., Clarke, C. T. and Nudd, G. R., 1992. VLSI arithmetic with current mode multiple valued logic. In: IEEE International Symposium on Circuits and Systems (ISCAS '92), 1992-05-10 - 1992-05-13, San Diego, CA.
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A general design methodology for arithmetic operators in current mode multiple value logic is described. It is based on the interconnection of single output functions of one current, quantizers, through summing nodes and current replicator circuits. Some quantizers are known already: radix 4 sum and carry circuits. The authors present new circuits for the discrete pseudologarithm and antilogarithm, which together give a single digit multiply circuit. These form a complete set that allows any arithmetic circuit to be constructed
|Item Type||Conference or Workshop Items (Paper)|
|Creators||Summerfield, S., Clarke, C. T. and Nudd, G. R.|
|Uncontrolled Keywords||vlsi arithmetic,integrated logic circuits,arithmetic circuit,current mode multiple valued logic,many-valued logics,single digit multiply circuit,discrete pseudologarithm,antilogarithm,vlsi,logic design,design methodology,digital arithmetic|
|Departments||Faculty of Engineering & Design > Electronic & Electrical Engineering|
|Additional Information||Vol. 6|
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