VSLI costs of arithmetic parallelism: A residue reverse conversion perspective
Reference:
Bhardwaj, M., Srikanthan, T. and Clarke, C. T., 1999. VSLI costs of arithmetic parallelism: A residue reverse conversion perspective. In: 14th IEEE Symposium on Computer Arithmetic, 1999-04-14 - 1999-04-16, Adelaide.
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Details
| Item Type | Conference or Workshop Items (Paper) |
| Creators | Bhardwaj, M., Srikanthan, T. and Clarke, C. T. |
| Departments | Faculty of Engineering & Design > Electronic & Electrical Engineering |
| Refereed | Yes |
| Status | Published |
| ID Code | 15548 |
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