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FPGA-aware techniques for rapid generation of profitable custom instructions


Reference:

Prakash, A., Lam, S.-K., Clarke, C.T. and Srikanthan, T., 2013. FPGA-aware techniques for rapid generation of profitable custom instructions. Microprocessors and Microsystems, 37 (3), pp. 259-269.

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    Official URL:

    http://dx.doi.org/10.1016/j.micpro.2013.02.002

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    Abstract

    Instruction set extension of FPGA based reconfigurable processors provides an effective means to meet the increasingly strict design constraints of embedded systems. We have shown in our previous works [20,21] that the usage of FPGA architectural constraints for pruning the design space during enumeration of custom instructions/patterns not only leads to notable reduction in the time taken to identify custom instructions but can also result in the selection of profitable custom instructions when the area is highly constrained. However when area constraint is relaxed, the previously proposed methods failed to perform better than traditional methods. In this paper, we propose a heuristic to identify profitable custom instructions for designs with arbitrary area constraints. The proposed heuristic relies on a new pruning criterion to enumerate patterns with high size-to-hardware-area ratio. We also proposed a suitable algorithm to select profitable custom instructions from the enumerated patterns. The proposed template selection algorithm takes advantage of the FPGA area-time measures of the enumerated patterns, which can be easily inferred from the FPGA-aware enumeration strategy. Experimental results show that the proposed methods in this paper result in custom instructions that achieve an average performance gain of 76.23% over current state-of-the-art approaches

    Details

    Item Type Articles
    CreatorsPrakash, A., Lam, S.-K., Clarke, C.T. and Srikanthan, T.
    DOI10.1016/j.micpro.2013.02.002
    Related URLs
    URLURL Type
    http://www.scopus.com/inward/record.url?scp=84874839231&partnerID=8YFLogxKUNSPECIFIED
    DepartmentsFaculty of Engineering & Design > Electronic & Electrical Engineering
    Research CentresCentre for Advanced Sensor Technologies (CAST)
    Publisher StatementClarke_2013_Microprocessors_and_Microsystems_37_3_259.pdf: NOTICE: this is the author’s version of a work that was accepted for publication in Microprocessors and Microsystems. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Microprocessors and Microsystems, vol 37, issue 3, 2013, DOI 10.1016/j.micpro.2013.02.002
    RefereedYes
    StatusPublished
    ID Code35408

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