Static pattern predictor (SPP) based low power instruction cache design
Vivekanandarajah, K., Srikanthan, T., Clarke, C. T. and Bhattacharyya, S., 2003. Static pattern predictor (SPP) based low power instruction cache design. In: International Conference on Embedded Systems and Applications (ESA03), 2003-06-23 - 2003-06-26, Las Vegas, NV.
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|Item Type||Conference or Workshop Items (Paper)|
|Creators||Vivekanandarajah, K., Srikanthan, T., Clarke, C. T. and Bhattacharyya, S.|
|Departments||Faculty of Engineering & Design > Electronic & Electrical Engineering|
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